The present invention relates generally to an integrated circuit design, and more particularly to a system for inhibiting programming current disturbance that may occur during programming of a memory device.
In recent years, flash memory has become one of the most popular choices of read-only memories (ROM) available in the market mainly because of its capability of allowing easy and fast permanent data storage for devices such as computers, digital cameras, and many other portable devices. While other storage methods such as hard drives and random-access memory (RAM) are still used, flash memory can provide users with the best of both worlds. Flash memory is considered a solid state device, meaning that there are no moving parts within the memory module. This feature allows flash memory to provide a user with a quicker and more reliable way of storage, especially in environmental conditions where moving parts are prone to mechanical errors. Flash memory is also non-volatile, which means that the programmed state can be maintained without the need of a continuously supplied power. This allows the user to write data into the memory cells permanently, a feature that is absent in RAM.
It is well-known in flash array designs that cells share a common source region or a common source line in a group. During the programming process of a flash memory array with a stacked gate design, a memory cell that is to be programmed is selected with the corresponding bit-line and the corresponding word-line. A programming voltage is applied to a common source line and a selecting voltage is applied to a word-line such that the selected cell can be programmed with the designed state. However, the unselected cells, which are supposed to maintain their original state without the influence of the programming process, are found to be easily disturbed within the conventional configurations. During the programming of the selected cell, the source of the selected cell has a high programming voltage, thereby creating a large voltage difference for the neighboring cells. The voltage difference is large enough to cause “punch-through” disturbance to the other unselected memory cells. When the threshold voltage of the neighboring cell that is connected on the same selected bit-line is lower than the threshold voltage of the selected memory cell that is to be programmed in the bit-line, “punch-through” may be made worse, i.e., there may be hot electrons available to program an inhibited, erased memory cell from the unselected word-line. Similarly, when the threshold voltage of the selected memory cell is higher than the threshold voltage of the neighboring cell that is coupled to the same word-line, there may be hot electrons available to program an inhibited, erased memory cell from the neighboring, unselected bit-line (also known as program-FF disturbance). With the continuous narrowing down of the cell size and the operating voltage of the flash memory cells, the flash memory cells being operated at low VDD are found to seriously suffer the harm of programming or writing disturbance.
A commonly practiced conventional solution is to pull-up the unselected bit-lines with a fixed pull-up current such that disturbances for the unselected memory cells can be reduced. However, current methods used for bit-line pull-up provide a programming current that is equal to the difference between the pull-down current and the pull-up current, thereby creating difficulties in controlling a large variation of programming voltage. This large variation in programming current can potentially lower yield.
It is therefore desirable to have a circuit design that can provide the necessary pull-up current for the unselected bit-line for reducing disturbances during programming without creating a large programming current variation.